New 
Senior Signal and Power Integrity Engineer
 Microsoft | |
 United States, North Carolina, Raleigh | |
 Jan 22, 2025 | |
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OverviewThe Microsoft Silicon team is transforming the ways people communicate, create, and collaborate through the devices and components we develop. We're a growing team of engineers on a mission to develop revolutionary designs and provide leading edge silicon device solutions to power Microsoft computer and datacenter requirements. Microsoft systems including Azure, Xbox and HoloLens incorporate our internally developed silicon components. Our team is creative and resourceful; we value growth and learning. We want to amplify your abilities so you can do your best work. Join us, and together we'll turn groundbreaking hardware designs into reality! We are seeking a Senior Signal Integrity and Power Integrity (SIPI) engineer to work in the Microsoft Azure hardware engineering team responsible for developing advanced power delivery and signaling solutions for High Performance Computing (HPC) silicon designs. In this role, you will be responsible for driving the completion of SIPI design solutions supporting overall SOC performance interfacing with silicon, packaging, and system design teams. Microsoft's mission is to empower every person and every organization on the planet to achieve more. As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals. Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.#azurehwjobs
ResponsibilitiesWe are seeking an engineer to deliver premium-quality designs once considered impossible. We are responsible for delivering cutting-edge, custom IP and SoC designs that can perform complex and high-performance functions in an extremely efficient manner. SIPI engineer for compute and AI SoCs and platforms - Implement strategies for end-to-end power delivery design and signal integrity design from Silicon to Package, and linking to Platform to System and Cloud.Deliver SIPI solutions that meet the HPC demands across the entire system. Drive future power and signal integrity solutions for chiplet architecture with advanced packaging and advanced silicon nodes.Design, model, and simulate SI and PI (i.e., incl. IP design, voltage regulator, motherboard, CPU package, silicon, and decoupling capacitor solution) for data center processors and corresponding platforms to ensure optimized performance. Performs DC, AC and transient simulation to provide noise, impedance profile of the whole power delivery path and link/electrical simulations to validate I/O performance from platform to silicon. Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers. Drives the execution of architecture solutions across product lines or multiple product groups across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines. Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs. Embody our Culture and Values | |